The Foundation for Advancement of Education and Research (FAER) is a non-governmental, non-profit initiative open to all. Its objective is to bring together several educational institutions and industries with the intention of conducting faculty development programs/student scholar programs, facilitating in the running of long term degree/diploma programs in new areas, and taking up, in general, several activities related to quality education at all levels. Several senior and reputed academics and industry leaders are associated with the activities of FAER. Many industries like Intel, Motorola, D-Link, Agilent. Alcatel, Integra Micro Systems, TCS, PAM networks, are also closely associated with the foundation. Detailed information about the foundation is available at http://www.faer.ac.in.

FAER has been promoting greater communication and coordination between institutions of learning and business houses. The underlying principle behind this is that students in universities stand to gain a lot by coming in contact early with the world they will be working in after they graduate. To this end, FAER is trying to coordinate with various universities and industry leaders so that students and faculty can benefit from the experiences of veterans in the business of developing and selling technology. FAER is planning to initiate a programme named "Reach to Teach", consisting of a series of lectures on computer architecture delivered by eminent personalties in the education and corporate worlds, such as I.I.Sc., IITs (Kanpur, Madras, Delhi), Intel, and other such institutions. The objectives of this programme include:

1.      To create an environment in which expert teachers can reach out to a large number of students and faculty. This reduces information divide. Students and faculty will have access to experts from academic institutions like IISc and IITs and industries like Intel.

2.      To experiment on two way video based virtual class rooms on Internet, and in the process, fine tune the distance learning system.

3.      To generate a model for networking and sharing amongst institutions (this will augment world bank sponsored TEQIP's networking activities)

4.      To provide current knowledge to faculty and students from several institutions on architecture thereby increasing the motivational aspect and inculcating research ideas. to become a starter for good research activities in the area of computer architecture in several institutions.

Current courses in computer architecture are conducted in a traditional manner, and concentrate on the basic principles of the technology. However, vast strides have been made in recent years, and it is important for students to be aware of the latest trends in the industry, as well as the forecast for the immediate future.

Short term courses and individual lectures do not provide the environment and time for complete learning and absorption of knowledge. Therefore it is proposed to conduct a series of lectures over a four-month period, utilizing about two-and-a-half hours every week. Considering the calibre and class of the faculty, it is imperative that we take the maximum advantage of the time they spend on this programme. We therefore propose to conduct the lectures in a manner that will make it accessible over the Internet, to several locations simultaneously, using two-way video/audio communication methods. The lectures can also be recorded for future reference and use by any university/institution. Participants from any location will be able to interact with the speaker during the interaction time slot.

As a run-up to these efforts, FAER has already conducted the Motorola Awards function in a similar manner, streaming the video of the entire proceedings to all institutions via the Internet. This experiment was very successful, and we plan to extend this method of communication to many of our future endeavours. While similar experiments have been tried over Edusat and satellite based communications, such facilities are not available everywhere, and therefore we decided to the Internet route for conducting this full fledged course. The concept of this course has been discussed with faculty and Directors of several NITs and engineering colleges and they have welcomed this program.

The Coordinator of this programme is Mr. M. K. Srikant, Director, Integra Microsystems Pvt., Ltd., Bangalore.

Participation

The following distinguished persons have been invited, and have agreed to deliver the lectures:

l        Prof. P. C. P. Bhatt IIT Delhi (Rtd.)

l        Prof. R. Govindarajan, Chairman, SERC, IISc.

l        Prof. Matthew Jacob, SERC/CSA  IISc.

l        Prof. Kamakoti, CSE , IIT  Chennai.

l        Mr. Velayudham Ramamurthy, Motorola

l        Prof. D K Subramanian, IISc (Rtd.)

l        Experts from Intel

l        Prof. Mainak Choudhry, IIT Kanpur

l        Prof. Rajat Moona,  IIT Kanpur

l        Prof. Sathish Vadhyar, IISc

The following institutions have already agreed to participate in this programme:

l        NIT, Tiruchirappalli

l        NIT, Calicut

l        NIT, Allahabad

l        NIT, Suratkal

l        NIT, Warangal

l        NIT, Durgapur

l        NIT, Agartala

l        NIT, Jaipur

l        NIT, Kurukshetra

l        SDMCET, Dharwad

l        PDACE, Gulbarga

l        SSIT, Tumkur

l        SIT, Tumkur

l        MSRIT, Bangalore

As may be apparent, this is a unique opportunity to participate in a high quality educational programme. The added advantages are simultaneous availability at multiple locations, thereby eliminating time and money spent on travel, archival of each session for future reference, and ability to interact with a large cross section of the student and faculty community. We would therefore like to invite you to actively participate in this programme, and take advantage of the new age technologies and methods of sharing information in this knowledge world. The attached document gives some more information about the programme and the pre-requisites for participating in this programme.

In order to run this program effectively we need the following support from your institution:

1.      A coordinator, preferably a senior faculty from the department of ECE / CSE with interests in architecture.

2.      A video conferencing facility with a camera, computer connections and internet connections.

3.      Broadband connectivity of at least 2 Mbps.

4.      A server capable of storing video streams of 3 hrs.

5.      An LCD projector and screen in a class room

The participants can be faculty and students of third and fourth year in ECE/CSE/ISE departments.  We expect all participants to register for the course. We hope the coordinator will conduct the registration process. A nominal registration fee of Rupees Five Hundred for each student may be collected for this program please. The last date for registration is December 30, 2007. We plan to start the program by mid January 2008.

Selections for Intel Scholar Program and intern programmes will be from among the successful participants of this program. Faculty will have opportunities for Intel research activities on multi core. 

We are sure you will be interested in this program and experiment it with us. Kindly intimate to us before 7^th December 2007 the name and address along with phone number and email id of the coordinator. We seek your cooperation and support in this unique venture. Posters are attached with this mail. Kindly display these please.

Thanking you for your support and cooperation,

With greetings,

Yours sincerely,

Prof. D K Subramanian

President, FAER

Prerequisites and Eligibility

About the programme

This programme will supplement the course on architecture run by the institutions. In the initial stages, this programme may not be treated as a course for requirements of credit for examinations. The programme is planned for a period of four months, starting from January 2008 through May 2008. It will include two hours of lectures every week, and an additional half hour for interactions. The lectures will be held on Thursday afternoon or Friday afternoon, probably between 2 pm and 4:30 pm.

A programme committee will be set up to monitor the smooth functioning of the course with members from FAER, and some faculty members.

Requirements at each institution

The facilities required at each institution include:

1.      A good class room with  LCD projection and display facilities

2.      A computer with enough storage to hold the lectures (at least 1 GB main memory and 80 GB disk)

3.      Broadband connectivity of 2 Mbps minimum and availability at the class room

4.      A video conferencing unit with a camera, streaming software, and other facilities for interaction. The camera will be located in the class room.

Each institution will be required to identify a faculty coordinator preferably from the area of computer architecture. The institution will also need to identify a technical support person to operate the various systems like VCU, servers, computers, displays etc.

Functions of the coordinator

The faculty coordinator will take care of registration of students by December 2007. He or she will also be responsible for:

l        Registration of students and faculty for the programme

l        Ensure attendance of students at each lecture

l        Liaison with FAER

l        Handling the availability of room and checking the working of the systems

l        Providing the slot on the time table for this programme

Eligibility of participants

Both faculty and students are eligible. Students should be preferably from the third year from the departments of Computer Science and Engineering, Information Science and Engineering, and Electronics and Communications Engineering. Faculty from these departments may also be encouraged to attend. A maximum of 50 participants per institution will be accepted in the initial stages.

Participants will be required to register for the programme, and are expected to attend consistently through the entire course. A nominal registration fee of Rs. 500 (Rupees Five Hundred only) for each student participant will be charged, which will be utilised for operational expenses at each participating location.

A certificate will be awarded at the end of the course for those who complete the programme successfully.

For detailed information and registering your institute, please email to: office@faer.ac.in