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Dr. R. Govindarajan Dr. R. Govindarajan is a Professor at the Supercomputer Education and Research Centre (SERC) (as well as the Department of Computer Science and Automation), Indian Institute of Science, Bangalore, where he is currently the Chairman of the SERC. His research interests lie in the areas of computer architecture, compilers and high performance computing. Dr. Matthew Jacob Dr. Matthew Jacob is an Associate Professor at the Supercomputer Education and Research Centre (as well as the Department of Computer Science and Automation), Indian Institute of Science, Bangalore. His research interest lies in the area of performance evaluation methodologies for computer architecture. Er. Baskaran Ganesan Er. Baskaran Ganesan works for Intel India (Bangalore) as a Senior Design Engineer in the Digital Enterprise Group. He has been with Intel since 2003 and has worked on Architecture, Micro-architecture and Design of several multi-core Xeon CPUs. Before joining Intel, Baskaran worked for Compaq-Houston, doing IA32 chipsets (memory controllers and north-bridges). Baskaran received his B.Tech (EEE) from Pondicherry Engineering College and his M.S (EE) from University of Houston. Born in Chennai and obtained B.E. (1997) in Electronics and Communication from College of Engineering, Guindy, Anna University, Chennai. M.Tech. (1999) in Electronics Design and Technology from Indian Institute of Science, Bangalore. Ph.D. (2004) in RF Packaging from Katholieke Universiteit-IMEC, Leuven, Belgium. Worked at IBM T.J. Watson Research Centre as a Summer Co-op on RF packaging and materials (2003). Currently employed as Sr. Package Designer at Intel Technologies India Pvt. Ltd. in The Digital Enterprise Group (since 2004). Published over 20 papers in international conferences and journals and 2 patents pending. Over 8 eight years of teaching experience. IEEE-CPMT society member.
Akshay Kadam is an architect with Intel's Corporate Technology Group, Systems Technology Lab. He has worked in a variety of domains including scalable performance/functional simulation framework for Intel I/O processors, generic & portable distributed fault-tolerant systems for control-plane protocols deployed in telecommunications networks as well as embedded SAS / SATA firmware for Intel's latest generation of storage IO processors. His current work centers around developing advanced future storage capabilities as well as exploring advanced platform level trust and security capabilities for next generation Intel platforms. Akshay has been with Intel for 10 years. Dr. Sriram Vajapeyam Dr. Sriram Vajapeyam is currently a member of the IBM Blue-Gene supercomputer architecture, design, and verification team. Previously he was founding Director of Oracle's Real-Time Collaboration Research Group which conducted applied research in the area of multimedia collaboration over IP networks. Earlier Vajapeyam was a faculty member in India for about 9 years. Vajapeyam's academic research in computer architecure was the technical basis for two US-based startups, one a Bay-area startup in the area of processor design and another an MIT startup in the area of runtime program fault monitoring / error-recovery. During his career Vajapeyam has held visiting positions at MIT, Cray Research, Intel Microprocessor Research Labs, ACRI-France, University of Wisconsin, USC-LA, and UPC Barcelona. Sriram Vajapeyam holds a Ph.D. in Computer Science from the University of Wisconsin-Madison and a B.Tech. in Electrical Engineering from IIT-Madras. Rama Kishan Malladi is an Application Engineer with the Software and Solutions Group at Intel. He works with various ISVs, enabling their applications on the latest Intel platforms by addressing architecture, platform, and performance-related issues. Rama has been working with Intel for the past 4 years supporting Intel Software Tools, tuning high-performance computing applications on Intel architecture, and resolving performance issues on client/server applications. Naveen G V is a Technical Consulting Engineer in the Performance Library Lab at Intel. He provides core technical support to customers across Asia Pacific to use Intel® Integrated Performance Primitives and Intel® Math Kernel Library. Naveen has worked with several Universities across Asia Pacific to implement Multi-Core programming in academia. His professional interests are teaching Multi core Programming Methodology to software community and implementing Digital Signal Processing algorithms on x86 platform. Dr. Praveen Vishakantaiah is the Intel India President responsible for all the Intel activities in India. Praveen joined Intel, USA in 1993 and held various leadership positions in microprocessor design technology development and in the Pentium® II, Pentium® III and Pentium® 4 microprocessor development teams. He relocated to Intel, India in 2003 to start microprocessor post-silicon validation for Xeon® server platforms. He later became the Director of Digital Enterprise Group at Intel, India and was responsible for research and development of various Xeon® server platform ingredients including microprocessors developed in India. He was also one of the winners of the first Intel Innovators award in 1995. Praveen holds MS and Ph.D degrees in Electrical and Computer Engineering from The University of Texas at Austin. He obtained his Bachelor of Engineering degree with Honors in Electronics and Communication from Regional Engineering College, Tiruchirapalli, India.
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| This page was updated on : 12/08/2008 11:47:45 AM +0530 |
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